1. Field of the Invention
The present invention is related to electronic memories for data processors and signal processors.
2. Description of the Prior Art
Multitudes of different types of memories are used in the prior art including magnetic memories, integrated circuit memories, and optical memories. The most pertinent prior art is integrated circuit read only memories and integrated circuit charge coupled device (CCD) memories. Integrated circuit read only memories are significantly more expensive than charge coupled device memories, primarily because such read only memories require more complex monolithic processes than are required for CCD memories and because such read only memories are random access memories thereby requiring more complex accessing circuitry and multitudes of parallel interconnections than are required for CCD memories. CCD memories are lower in cost than conventional read only memories, but CCD memories are volatile where all stored information is lost when power is turned off. This volatility characteristic is verified in the "Engineer's newsletter"; Electronics Magazine; Mar. 31, 1977; page 121; last sentence.
Therefore, the prior art has been constrained to expensive memories such as magnetic memories and integrated circuit read only memories when non-volatile capability is required.
The prior art is further defined in the art-of-record of the related applications in the chain of continuing applications including U.S. Pat. No. 2,961,535 to Lanning; U.S. Pat. No. 3,356,989 to Autry; U.S. Pat. No. 3,368,203 to Loizides; U.S. Pat. No. 3,613,771 to Quay; U.S. Pat. No. 3,618,052 to Kwei; U.S. Pat. No. 3,643,106 to Berwin; U.S. Pat. No. 3,654,499 to Smith; U.S. Pat. No. 3,662,351 to Ho; U.S. Pat. No. 3,701,978 to Miller; U.S. Pat. No. 3,775,738 to Quay; U.S. Pat. No. 3,753,242 to Townsend; U.S. Pat. No. 3,755,793 to Ho; U.S. Pat. No. 3,757,313 to Hines; U.S. Pat. No. 3,761,901 to Aneshansley; U.S. Pat. No. 3,771,148 to Aneshansley; U.S. Pat. No. 3,774,169 to Smith; U.S. Pat. No. 3,774,177 to Schaffer; U.S. Pat. No. 3,775,738 to Quay; U.S. Pat. No. 3,787,852 to Puckette; U.S. Pat. No. 3,801,967 to Berger; U.S. Pat. No. 3,810,126 to Butler; U.S. Pat. No. 3,826,926 to White; U.S. Pat. No. 3,852,745 to Le Bail; U.S. Pat. No. 3,868,516 to Buss; U.S. Pat. No. 3,873,958 to Whitehouse; U.S. Pat. No. 3,876,989 to Bankowski; U.S. Pat. No. 3,889,245 to Gosney; U.S. Pat. No. 3,891,977 to Amelio; U.S. Pat. No. 3,895,342 to Mallet; U.S. Pat. No. 3,909,806 to Uchida; U.S. Pat. No. 3,914,748 to Barton; U.S. Pat. No. 3,999,171 to Parsons; and U.S. Pat. No. 3,942,034 to Buss and including the article by Dennard, IBM Technical Disclosure Bulletin, Vol. 14, No. 12, May 1972, pages 3791-3792; the article by Altman, Electronics Magazine, Feb. 28, 1972, pages 62-71; and the article by Baertsch, Electronics Magazine, Dec. 6, 1971, pages 86-91.